cursada_mc2
Base de control de temperatura para EDU-CIAA-NXP
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cr_startup_lpc43xx.c
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1//*****************************************************************************
2// LPC43xx (Cortex-M4) Microcontroller Startup code for use with LPCXpresso IDE
3//
4// Version : 150706
5//*****************************************************************************
6//
7// Copyright(C) NXP Semiconductors, 2013-2015, 2020
8// All rights reserved.
9//
10// NXP Confidential. This software is owned or controlled by NXP and may only be
11// used strictly in accordance with the applicable license terms.
12//
13// By expressly accepting such terms or by downloading, installing, activating
14// and/or otherwise using the software, you are agreeing that you have read, and
15// that you agree to comply with and are bound by, such license terms.
16//
17// If you do not agree to be bound by the applicable license terms, then you may not
18// retain, install, activate or otherwise use the software.
19//*****************************************************************************
20
21#if defined (__cplusplus)
22#ifdef __REDLIB__
23#error Redlib does not support C++
24#else
25//*****************************************************************************
26//
27// The entry point for the C++ library startup
28//
29//*****************************************************************************
30extern "C" {
31 extern void __libc_init_array(void);
32}
33#endif
34#endif
35
36#define WEAK __attribute__ ((weak))
37#define ALIAS(f) __attribute__ ((weak, alias (#f)))
38
39//*****************************************************************************
40#if defined (__cplusplus)
41extern "C" {
42#endif
43
44//*****************************************************************************
45#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
46// Declaration of external SystemInit function
47extern void SystemInit(void);
48#endif
49
50//*****************************************************************************
51//
52// Forward declaration of the default handlers. These are aliased.
53// When the application defines a handler (with the same name), this will
54// automatically take precedence over these weak definitions
55//
56//*****************************************************************************
57void ResetISR(void);
58WEAK void NMI_Handler(void);
63WEAK void SVC_Handler(void);
68
69//*****************************************************************************
70//
71// Forward declaration of the specific IRQ handlers. These are aliased
72// to the IntDefaultHandler, which is a 'forever' loop. When the application
73// defines a handler (with the same name), this will automatically take
74// precedence over these weak definitions
75//
76//*****************************************************************************
78#if defined (__USE_LPCOPEN)
79void M0APP_IRQHandler(void) ALIAS(IntDefaultHandler);
80#else
81void M0CORE_IRQHandler(void) ALIAS(IntDefaultHandler);
82#endif
83void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
84void FLASH_EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
85void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
86void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
87void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
88void USB0_IRQHandler(void) ALIAS(IntDefaultHandler);
89void USB1_IRQHandler(void) ALIAS(IntDefaultHandler);
90void SCT_IRQHandler(void) ALIAS(IntDefaultHandler);
91void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
92void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
93void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
94void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
95void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
96void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
97void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler);
98void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
99void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
100void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
101void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler);
102void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
103void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
105void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
108void I2S0_IRQHandler(void) ALIAS(IntDefaultHandler);
109void I2S1_IRQHandler(void) ALIAS(IntDefaultHandler);
110void SPIFI_IRQHandler(void) ALIAS(IntDefaultHandler);
111void SGPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
112void GPIO0_IRQHandler(void) ALIAS(IntDefaultHandler);
113void GPIO1_IRQHandler(void) ALIAS(IntDefaultHandler);
114void GPIO2_IRQHandler(void) ALIAS(IntDefaultHandler);
115void GPIO3_IRQHandler(void) ALIAS(IntDefaultHandler);
116void GPIO4_IRQHandler(void) ALIAS(IntDefaultHandler);
117void GPIO5_IRQHandler(void) ALIAS(IntDefaultHandler);
118void GPIO6_IRQHandler(void) ALIAS(IntDefaultHandler);
119void GPIO7_IRQHandler(void) ALIAS(IntDefaultHandler);
120void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
121void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
122void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler);
123void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler);
124#if defined (__USE_LPCOPEN)
125void ADCHS_IRQHandler(void) ALIAS(IntDefaultHandler);
126#else
127void VADC_IRQHandler(void) ALIAS(IntDefaultHandler);
128#endif
129void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler);
130void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
131void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
132void M0SUB_IRQHandler(void) ALIAS(IntDefaultHandler);
133void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler);
134void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
135
136//*****************************************************************************
137//
138// The entry point for the application.
139// __main() is the entry point for Redlib based applications
140// main() is the entry point for Newlib based applications
141//
142//*****************************************************************************
143#if defined (__REDLIB__)
144extern void __main(void);
145#endif
146extern int main(void);
147//*****************************************************************************
148//
149// External declaration for the pointer to the stack top from the Linker Script
150//
151//*****************************************************************************
152extern void _vStackTop(void);
153
154//*****************************************************************************
155//
156// External declaration for LPC MCU vector table checksum from Linker Script
157//
158//*****************************************************************************
159WEAK extern void __valid_user_code_checksum();
160
161//*****************************************************************************
162#if defined (__cplusplus)
163} // extern "C"
164#endif
165//*****************************************************************************
166//
167// The vector table.
168// This relies on the linker script to place at correct location in memory.
169//
170//*****************************************************************************
171extern void (* const g_pfnVectors[])(void);
172__attribute__ ((used,section(".isr_vector")))
173void (* const g_pfnVectors[])(void) = {
174 // Core Level - CM4
175 &_vStackTop, // The initial stack pointer
176 ResetISR, // The reset handler
177 NMI_Handler, // The NMI handler
178 HardFault_Handler, // The hard fault handler
179 MemManage_Handler, // The MPU fault handler
180 BusFault_Handler, // The bus fault handler
181 UsageFault_Handler, // The usage fault handler
182 __valid_user_code_checksum, // LPC MCU Checksum
183 0, // Reserved
184 0, // Reserved
185 0, // Reserved
186 SVC_Handler, // SVCall handler
187 DebugMon_Handler, // Debug monitor handler
188 0, // Reserved
189 PendSV_Handler, // The PendSV handler
190 SysTick_Handler, // The SysTick handler
191
192 // Chip Level - LPC43 (M4)
193 DAC_IRQHandler, // 16
194#if defined (__USE_LPCOPEN)
195 M0APP_IRQHandler, // 17 CortexM4/M0 (LPC43XX ONLY)
196#else
197 M0CORE_IRQHandler, // 17
198#endif
199 DMA_IRQHandler, // 18
200 0, // 19
201 FLASH_EEPROM_IRQHandler, // 20 ORed flash Bank A, flash Bank B, EEPROM interrupts
202 ETH_IRQHandler, // 21
203 SDIO_IRQHandler, // 22
204 LCD_IRQHandler, // 23
205 USB0_IRQHandler, // 24
206 USB1_IRQHandler, // 25
207 SCT_IRQHandler, // 26
208 RIT_IRQHandler, // 27
209 TIMER0_IRQHandler, // 28
210 TIMER1_IRQHandler, // 29
211 TIMER2_IRQHandler, // 30
212 TIMER3_IRQHandler, // 31
213 MCPWM_IRQHandler, // 32
214 ADC0_IRQHandler, // 33
215 I2C0_IRQHandler, // 34
216 I2C1_IRQHandler, // 35
217 SPI_IRQHandler, // 36
218 ADC1_IRQHandler, // 37
219 SSP0_IRQHandler, // 38
220 SSP1_IRQHandler, // 39
221 UART0_IRQHandler, // 40
222 UART1_IRQHandler, // 41
223 UART2_IRQHandler, // 42
224 UART3_IRQHandler, // 43
225 I2S0_IRQHandler, // 44
226 I2S1_IRQHandler, // 45
227 SPIFI_IRQHandler, // 46
228 SGPIO_IRQHandler, // 47
229 GPIO0_IRQHandler, // 48
230 GPIO1_IRQHandler, // 49
231 GPIO2_IRQHandler, // 50
232 GPIO3_IRQHandler, // 51
233 GPIO4_IRQHandler, // 52
234 GPIO5_IRQHandler, // 53
235 GPIO6_IRQHandler, // 54
236 GPIO7_IRQHandler, // 55
237 GINT0_IRQHandler, // 56
238 GINT1_IRQHandler, // 57
239 EVRT_IRQHandler, // 58
240 CAN1_IRQHandler, // 59
241 0, // 60
242#if defined (__USE_LPCOPEN)
243 ADCHS_IRQHandler, // 61 ADCHS combined interrupt
244#else
245 VADC_IRQHandler, // 61
246#endif
247 ATIMER_IRQHandler, // 62
248 RTC_IRQHandler, // 63
249 0, // 64
250 WDT_IRQHandler, // 65
251 M0SUB_IRQHandler, // 66
252 CAN0_IRQHandler, // 67
253 QEI_IRQHandler, // 68
254};
255
256
257//*****************************************************************************
258// Functions to carry out the initialization of RW and BSS data sections. These
259// are written as separate functions rather than being inlined within the
260// ResetISR() function in order to cope with MCUs with multiple banks of
261// memory.
262//*****************************************************************************
263 __attribute__((section(".after_vectors"
264)))
265void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
266 unsigned int *pulDest = (unsigned int*) start;
267 unsigned int *pulSrc = (unsigned int*) romstart;
268 unsigned int loop;
269 for (loop = 0; loop < len; loop = loop + 4)
270 *pulDest++ = *pulSrc++;
271}
272
273__attribute__ ((section(".after_vectors")))
274void bss_init(unsigned int start, unsigned int len) {
275 unsigned int *pulDest = (unsigned int*) start;
276 unsigned int loop;
277 for (loop = 0; loop < len; loop = loop + 4)
278 *pulDest++ = 0;
279}
280
281//*****************************************************************************
282// The following symbols are constructs generated by the linker, indicating
283// the location of various points in the "Global Section Table". This table is
284// created by the linker via the Code Red managed linker script mechanism. It
285// contains the load address, execution address and length of each RW data
286// section and the execution and length of each BSS (zero initialized) section.
287//*****************************************************************************
288extern unsigned int __data_section_table;
289extern unsigned int __data_section_table_end;
290extern unsigned int __bss_section_table;
291extern unsigned int __bss_section_table_end;
292
293//*****************************************************************************
294// Reset entry point for your code.
295// Sets up a simple runtime environment and initializes the C/C++
296// library.
297//
298//*****************************************************************************
299void ResetISR(void) {
300
301// *************************************************************
302// The following conditional block of code manually resets as
303// much of the peripheral set of the LPC43 as possible. This is
304// done because the LPC43 does not provide a means of triggering
305// a full system reset under debugger control, which can cause
306// problems in certain circumstances when debugging.
307//
308// You can prevent this code block being included if you require
309// (for example when creating a final executable which you will
310// not debug) by setting the define 'DONT_RESET_ON_RESTART'.
311//
312#ifndef DONT_RESET_ON_RESTART
313
314 // Disable interrupts
315 __asm volatile ("cpsid i");
316 // equivalent to CMSIS '__disable_irq()' function
317
318 unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100;
319 // LPC_RGU->RESET_CTRL0 @ 0x40053100
320 // LPC_RGU->RESET_CTRL1 @ 0x40053104
321 // Note that we do not use the CMSIS register access mechanism,
322 // as there is no guarantee that the project has been configured
323 // to use CMSIS.
324
325 // Write to LPC_RGU->RESET_CTRL0
326 *(RESET_CONTROL + 0) = 0x10DF1000;
327 // GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST|
328 // USB1_RST|USB0_RST|LCD_RST|M0_SUB_RST
329
330 // Write to LPC_RGU->RESET_CTRL1
331 *(RESET_CONTROL + 1) = 0x01DFF7FF;
332 // M0APP_RST|CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST|
333 // I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST|
334 // DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST|
335 // RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST
336
337 // Clear all pending interrupts in the NVIC
338 volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280;
339 unsigned int irqpendloop;
340 for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) {
341 *(NVIC_ICPR + irqpendloop) = 0xFFFFFFFF;
342 }
343
344 // Reenable interrupts
345 __asm volatile ("cpsie i");
346 // equivalent to CMSIS '__enable_irq()' function
347
348#endif // ifndef DONT_RESET_ON_RESTART
349// *************************************************************
350
351#if defined (__USE_LPCOPEN)
352 SystemInit();
353#endif
354
355 //
356 // Copy the data sections from flash to SRAM.
357 //
358 unsigned int LoadAddr, ExeAddr, SectionLen;
359 unsigned int *SectionTableAddr;
360
361 // Load base address of Global Section Table
362 SectionTableAddr = &__data_section_table;
363
364 // Copy the data sections from flash to SRAM.
365 while (SectionTableAddr < &__data_section_table_end) {
366 LoadAddr = *SectionTableAddr++;
367 ExeAddr = *SectionTableAddr++;
368 SectionLen = *SectionTableAddr++;
369 data_init(LoadAddr, ExeAddr, SectionLen);
370 }
371 // At this point, SectionTableAddr = &__bss_section_table;
372 // Zero fill the bss segment
373 while (SectionTableAddr < &__bss_section_table_end) {
374 ExeAddr = *SectionTableAddr++;
375 SectionLen = *SectionTableAddr++;
376 bss_init(ExeAddr, SectionLen);
377 }
378
379#if !defined (__USE_LPCOPEN)
380// LPCOpen init code deals with FP and VTOR initialisation
381#if defined (__VFP_FP__) && !defined (__SOFTFP__)
382 /*
383 * Code to enable the Cortex-M4 FPU only included
384 * if appropriate build options have been selected.
385 * Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
386 */
387 // CPACR is located at address 0xE000ED88
388 asm("LDR.W R0, =0xE000ED88");
389 // Read CPACR
390 asm("LDR R1, [R0]");
391 // Set bits 20-23 to enable CP10 and CP11 coprocessors
392 asm(" ORR R1, R1, #(0xF << 20)");
393 // Write back the modified value to the CPACR
394 asm("STR R1, [R0]");
395#endif // (__VFP_FP__) && !(__SOFTFP__)
396 // ******************************
397 // Check to see if we are running the code from a non-zero
398 // address (eg RAM, external flash), in which case we need
399 // to modify the VTOR register to tell the CPU that the
400 // vector table is located at a non-0x0 address.
401
402 // Note that we do not use the CMSIS register access mechanism,
403 // as there is no guarantee that the project has been configured
404 // to use CMSIS.
405 unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
406 if ((unsigned int *) g_pfnVectors != (unsigned int *) 0x00000000) {
407 // CMSIS : SCB->VTOR = <address of vector table>
408 *pSCB_VTOR = (unsigned int) g_pfnVectors;
409 }
410#endif
411
412#if defined (__USE_CMSIS)
413 SystemInit();
414#endif
415
416#if defined (__cplusplus)
417 //
418 // Call C++ library initialisation
419 //
420 __libc_init_array();
421#endif
422
423#if defined (__REDLIB__)
424 // Call the Redlib library, which in turn calls main()
425 __main();
426#else
427 main();
428#endif
429
430 //
431 // main() shouldn't return, but if it does, we'll just enter an infinite loop
432 //
433 while (1) {
434 ;
435 }
436}
437
438//*****************************************************************************
439// Default exception handlers. Override the ones here by defining your own
440// handler routines in your application code.
441//*****************************************************************************
442__attribute__ ((section(".after_vectors")))
443void NMI_Handler(void) {
444 while (1) {
445 }
446}
447__attribute__ ((section(".after_vectors")))
448void HardFault_Handler(void) {
449 while (1) {
450 }
451}
452__attribute__ ((section(".after_vectors")))
453void MemManage_Handler(void) {
454 while (1) {
455 }
456}
457__attribute__ ((section(".after_vectors")))
458void BusFault_Handler(void) {
459 while (1) {
460 }
461}
462__attribute__ ((section(".after_vectors")))
463void UsageFault_Handler(void) {
464 while (1) {
465 }
466}
467__attribute__ ((section(".after_vectors")))
468void SVC_Handler(void) {
469 while (1) {
470 }
471}
472__attribute__ ((section(".after_vectors")))
473void DebugMon_Handler(void) {
474 while (1) {
475 }
476}
477__attribute__ ((section(".after_vectors")))
478void PendSV_Handler(void) {
479 while (1) {
480 }
481}
482__attribute__ ((section(".after_vectors")))
483void SysTick_Handler(void) {
484 while (1) {
485 }
486}
487
488//*****************************************************************************
489//
490// Processor ends up here if an unexpected interrupt occurs or a specific
491// handler is not present in the application code.
492//
493//*****************************************************************************
494__attribute__ ((section(".after_vectors")))
495void IntDefaultHandler(void) {
496 while (1) {
497 }
498}
unsigned int __data_section_table_end
#define ALIAS(f)
WEAK void PendSV_Handler(void)
WEAK void MemManage_Handler(void)
void ResetISR(void)
WEAK void SVC_Handler(void)
unsigned int __bss_section_table
WEAK void UsageFault_Handler(void)
unsigned int __bss_section_table_end
unsigned int __data_section_table
WEAK void SysTick_Handler(void)
WEAK void IntDefaultHandler(void)
WEAK void HardFault_Handler(void)
void DAC_IRQHandler(void)
#define WEAK
__attribute__((section(".after_vectors")))
WEAK void BusFault_Handler(void)
WEAK void NMI_Handler(void)
WEAK void DebugMon_Handler(void)
int main(void)
Definition main.c:24
void SystemInit(void)
Definition sysinit.c:48
void UART3_IRQHandler(void)
void UART0_IRQHandler(void)
void UART2_IRQHandler(void)